Several VHDL code examples are listed below. Each example includes the source code and simulation waveform. Also, at the footer of each example you can find a link to download both the model source and testbench files.
Note: The categories marked with an (includes exercises) have proposed exercises for you to practice. Check them out!
Sources List
Binary to seven-segment decoder
Generic Demultiplexer / Decoder
Generic up-down counter (includes exercises)
Parameterized PWM controller (includes exercises)
Serial to parallel converter (includes exercises)
FPGA'er 
With the possible exception of the PWM controller, I wouldn’t write any of these as entities. I would write them as procedures or maybe functions. But for practice I suppose it doesn’t matter which way they are coded.
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You possibly have a point in the case of just two of the examples: “Binary to seven-segment decoder” and “Generic Demultiplexer/Decoder.” However I think these are fine just as they are.
But none of the other seven blocks are better written as procedures or functions. Procedures and functions can’t, in general, retain state information internally between calls.
Clocked sequential circuitry meant for synthesis is best implemented in design entities, as the author shows in these clear and useful examples.
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BTW, the link for the first example links to Generic register with load and not Binary to seven-segment decoder
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Thanks for pointing that out. I have corrected the link
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