Cyclone V GX Starter kit – HW LED flasher

The first in the projects for the Cyclone V GX Starter kit will be a HW LED flasher. Although the design is very easy, it is a complete design including absolutely all the elements needed to achieve a reliable design with timing closure. For an introduction about the Cyclone V GX Starter kit evaluation board, … Continue reading Cyclone V GX Starter kit – HW LED flasher

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Cyclone V GX Starter Kit – Introduction

  The Cyclone V GX Starter kit is an Evaluation Board (EVB) from Terasic based on Altera's Cyclone V GX FPGA. The Cyclone V Starter Kit development board includes hardware such as Arduino Header, on-board USB Blaster, audio and video capabilities and much more On further entries of the blog, I will be including several … Continue reading Cyclone V GX Starter Kit – Introduction

BeMicro CV – HW & SW LED flasher

The second project for the BeMicro CV board will be a HW/SW LED flasher. From the LEDs present in the board, some will be flashed by HW, and others will be flashed by SW running on a NIOS processor. For an introduction about the Be Micro CV evaluation board, please refer to this post. What will … Continue reading BeMicro CV – HW & SW LED flasher

BeMicro CV – HW LED flasher

The first in the projects for the BeMicro CV board will be a HW LED flasher. Although the design is very easy, it is a complete design including absolutely all the elements needed to achieve a reliable design with timing closure. For an introduction about the Be Micro CV evaluation board, please refer to this … Continue reading BeMicro CV – HW LED flasher

BeMicro CV – Introduction

The BeMicro CV is an Evaluation Board (EVB) based on Altera's Cyclone V FPGA. For a very low cost, this EVB offers the opportunity to evaluate and test our VHDL designs. On further entries of the blog, I will be including several projects based on this EVB. The BeMicro CV board features the following major … Continue reading BeMicro CV – Introduction

Altera FPGA at the wheel of an Audi A8

Audi announced its piloted driving technology at CES 2015. The Audi Prologue includes the Advanced Driver Assistance System Platform (zFAS), co-developed with TTTech. The zFAS board is based on four devices: an Nvidia k1 processor and Infineon Aurix processor, Mobileye’s EyeQ3 for vision processing, and an Altera Cyclone V FPGA which provides sensor fusion, combining data from multiple sensors … Continue reading Altera FPGA at the wheel of an Audi A8

Timers Block – Part Two

On the previous entry of this series we went through the VHDL source file and simulation of a Timer component. In this entry, we will instantiate several Timer components to create a timer bank (or block of timers). The code is attached below: The load_sel signal is an address bus that selects which timer to initialize. … Continue reading Timers Block – Part Two