Pseudo random generator Tutorial – Part 3

On the first two chapters of this Tutorial we started with a simple LFSR module and added a test bench. Then, on chapters three and four we upgraded our module with some features and learned to export the test bench data to files. Chapter 5 - Matlab Formal Verification Our VHDL block implements an algorithm … Continue reading Pseudo random generator Tutorial – Part 3

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Pseudo random generator Tutorial – Part 2

Modelsim Altera running an LFSR simulation On the first part of this tutorial, we started with a simple implementation of an LFSR block (Chapter 1) and it test bench (Chapter 2). Let's make our code a bit more professional. Chapter 3 - Upgrading the LFSR code Good code doesn't use hard-coded constants as were used … Continue reading Pseudo random generator Tutorial – Part 2

Pseudo random generator Tutorial

In this tutorial we will see how to design a block. We will start with a very simple block and gradually add features to it. We will also simulate it and test its output with Matlab. Over the process we will see: How to start with a simple block and gradually add features and improvements … Continue reading Pseudo random generator Tutorial

MIF_Gen – A Matlab Utility

Many times I find myself in the need of generating data for testing. We need data for verification, either done on simulation or on the real target. One easy way to test our system is to generate data vectors on RAM. Altera RAM IP includes the ability to initialize RAM contents during power-up by means … Continue reading MIF_Gen – A Matlab Utility