VHDL-2008 quick reference – IF GENERATE statement

IF GENERATE statement

VHDL-2008 greatly enhanced this command. Now it is possible to include elseif and else clauses to the IF GENERATE statement.

label: 
  if cond1 generate
    ... block instantiations, statements, declarations ...  
  elsif cond2 generate  
    ... block instantiations, statements, declarations ... 
  else generate
    ... block instantiations, statements, declarations ... 
  end generate label;